A fully implantable multichip neural interface with a new scalable current-reuse front-end

This paper presents a fully implantable brain machine interface based on a new CMOS system-on-a-chip (SOC) including a low-power multi-channel current-reuse analog front-end (AFE), a multi-band wireless transceiver and a power management unit retrieving power from a 13.56 MHz carrier through a new 5-coil inductive link. In addition to this SOC, the proposed interface includes a low-power microcontroller, a wideband antenna and a double-sided power recovery coil. All components are bonded on a thin flexible printed circuit board. The AFE uses a new current-reuse circuit topology based on a current-mirror opamp which is scalable to very large number of recording channels, thanks to its small implementation area and its low-power consumption. It includes a low-noise amplifier (LNA) and a programmable gain amplifier (PGA) presenting tree selectable gains of 35 dB, 43.1 dB and 49.5 dB. The SOC is fabricated in a CMOS 180-nm process and has a size of 1.3 mm × 1.8 mm. The AFE has a low-power consumption of 9 µW (4.5 µw for LNA and 4.5 µw for PGA) per channel, for an input referred noise of 3.2 µV. A 5-coil wireless power link is utilized with an efficiency of 28% and a maximum power delivered to the load of 81 mW through a 1 cm 2 flexible coil. The ultra wideband edge combining BPSK transmitter reaches a maximum data rate of 800 Mbps at 6.7 pJ/bit, and the 2.4-GHz OOK receiver reaches a maximum data rate of 100 Mbps. The whole system consumes 12.3 mW and weights 0.163 g. Finally, we present biological results obtained in-vivo from the cortex of an anesthetized mouse.