Physical Insight into Self-heating Induced Performance Degradation in RingFET

In nanoscale FETs, the confined geometry and increased packaging density induce increased power density, which translates into larger heat generation. The substrate’s low thermal conductivity also leads to poor heat dissipation, leading to a further rise in temperature and aggravated self-heating effects (SHEs). The incessant scaling of transistor size demands a rigorous study on the impact of SHEs and ambient temperature variations on advanced MOSFET structures’ electrical characteristics. Therefore, in this work, an investigation on the electro-thermal (ET) behaviour of the nanoscale RingFET has been conducted using the Sentaurus TCAD device simulator. The hydrodynamic carrier transport model has been used in 3-D ET simulations to analyze the ET behaviour of the RingFET. A comparative analysis of the DC characteristics with and without SHEs has been presented via current-voltage and transconductance-voltage characteristics, which are further used to compute the ZTC (zero temperature coefficient) bias point. A detailed analysis of the device’s electrical behaviour with the variation in channel length, gate oxide thickness, substrate doping, and drain radius has also been presented. Finally, the influence of SHEs on device characteristics at various ambient temperatures has also been reported.