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Reduching Hardware Complexity of an Array Architecture for the Motion Estimation Algorithm Using Truncated Pixels
Reduching Hardware Complexity of an Array Architecture for the Motion Estimation Algorithm Using Truncated Pixels
1998
Satoshi Hanazawa
Takao Okazaki
Keywords:
Parallel computing
Motion estimation
Computer vision
Systolic array
Pixel
Architecture
Artificial intelligence
Computer science
Nonlinear system
Electronic engineering
Quantization (signal processing)
Algorithm
Correction
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