A silicon-on-silicon RISC module

A RISC module for high-performance workstations has been made to demonstrate the advantage and technical feasibility of the silicon-on-silicon packaging technology. The module consists of one 0.8 μm CMOS CPU, one 0.8 μm CMOS FPU and six 1.0 μm BiCMOS cache memories. The eight chips are attached on a 39 × 47 mm 2 silicon substrate with 120 μm pitch flip-chip bonding of 80 μm diameter tin-lead bumps. Two-layer interconnections for high-speed signals are formed with 20 μm line and 80 μm space on the silicon substrate. The conductors are 4 μm thick gold formed by electroplating, and the dielectric film is 10 μm thick polyimide. A decoupling capacitance of about 0.8 μF is formed in the substrate