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Built-in self-test in a 24 bit floating point digital signal processor
Built-in self-test in a 24 bit floating point digital signal processor
1991
Narumi Sakashita
H. Sawai
Eiichi Teraoka
Toshiki Fujiyama
Toru Kengaku
Yukihiko Shimazu
A. Tada
Takeshi Tokuda
Keywords:
Theoretical computer science
Bit slicing
Mathematics
Audio bit depth
Fujitsu FR
Bit (horse)
Digital signal processor
Digital signal
Logarithmic number system
Computer hardware
Embedded system
Bit plane
Shift register
Correction
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