Embedded FLOTOX flash on ultra-low power 55nm logic DDC platform

We have successfully embedded flash memory on an ultra-low power (<;0.9V) 55nm Deeply Depleted Channel™ (DDC) platform. In spite of reduced thermal budget of DDC process, single-bit charge loss (SBCL) of flash after cycling can be optimized and is comparable to that of baseline embedded flash. We have also verified that improved variability and resultant ultra-low power digital performance of the DDC process is maintained in an embedded flash flow.