Partition Based Dynamic 2D HW Multitasking Management

The design of computing systems is facing an interesting challenge with the opportunity to include runtime reconfigurable (RTR) devices in them. Operating Systems (OS) need to be extended with functionalities that allow to efficiently manage such devices. Here we present a simple and fast algorithm for the management of FPGA area in a general-purpose computing system with hardware multitasking. It divides the device area into four partitions with different sizes. Each partition has an associated queue where the hardware manager places each arriving task depending on its size, shape and deadline requirements. Rectangular tasks may be rotated when necessary, and partition merging done if needed for tasks not fitting any partition. The queue selection cirterium and the size of the partitions may be changed during run-time in order to adapt algorithm behaviour to different circumstances. This is a constant complexity algorithm and we will show experimental results that prove it may compete in performance with other algorithms.