Analysis of charge transfer loss induced by off-axis slicing in CMOS image sensor

2014 
Photo diode (PD) well potential of 4-Tr CMOS image sensor (CIS) is changed according to the axial direction of off-axis wafer slicing which minimizes the channeling effect of ion implantation process. Channeling causes an incomplete charge transfer in the PD, and then results in the loss of PD well capacity eventually. In this paper, the effect of the axial direction of wafer slicing on the PD well potential profile is simulated with TCAD tool and the simulation result is examined through CMOS process actually. Furthermore, we show a way to compensate the change of effective tilt angle during the ion implantation process for creating N-type region in PD.
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