C++ based system simulator for pre-verification of system-on-a-chip devices : On SoC technology

In this paper, we will present our C++ based system simulator called ClassMate for use in both software and architecture pre-verification. It is especially designed for use in system-on-a-chip devices. Our approach is that of using a C++ class-based modeling technique in order to describe hardware modules, where an abstracted bus technology is newly proposed to connect I/O components to the system. Also, our approach allows for non cycle-accurate modeling technology for target hardware in order to improve simulation speed, and reduce the coding time. Moreover, this simulator can be used in conjunction with the behavioral synthesizer called Cyber, where it automatically generates the C++ cycle/bit accurate model for ClassMate from the algorithmic C-language source. This function allows the user to build up a co-simulation environment which involves automatically generated C++ hardware models and pre-implemented ISS-based CPU models. In this system, application software can be systematically debugged. We will show how this methodology achieves a high performance and more flexibility for system on a chip.