CMOS device with hexagonal cells

CMOS device comprising a semiconductor substrate (10) and a plurality of MOS transistor cells comprising: - a hexagonal ring gate (42) formed on the semiconductor substrate (10), - a drain region (44) in the semiconductor substrate (10) which is enclosed from the hexagonal ring gate (42), - a source region (46) in the semiconductor substrate (10) surrounding the hexagonal ring gate (42), - a drain contact (45) formed above the center of the drain region (44) and electrically connected thereto, - a plurality of source contacts (47) disposed around the hexagonal. Ring gate (42) are formed on around the source region (46) and electrically connected thereto, - a first guard ring (48) in the semiconductor substrate (10), which surrounds the MOS Transistor stor cells and against the semiconductor substrate (10) biased and - which surrounds a second guard ring (50) in the semiconductor substrate, the first protection ring (48), - each MOS transistor cell from the first guard ring (48) has the same distance.