Old Web
English
Sign In
Acemap
>
authorDetail
>
Jiejun Lu
Jiejun Lu
Reduced instruction set computing
Computer science
Electronic engineering
Parallel computing
CMOS
2
Papers
11
Citations
0.00
KQI
Citation Trend
Filter By
Interval:
1900~2024
1900
2024
Author
Papers (2)
Sort By
Default
Most Recent
Most Early
Most Citation
No data
Journal
Conference
Others
Hidden Markovian regime-switching models for pricing and investment in financial markets
2017
Jiejun Lu
Jiejun Lu
Show All
Source
Cite
Save
Citations (0)
A 4-MB on-chip L2 cache for a 90-nm 1.6-GHz 64-bit microprocessor
2005
ISSCC | International Solid-State Circuits Conference
H. McIntyre
Dennis Wendell
K. J. Lin
Pradeep Kaushik
Suresh Seshadri
A. Wang
V. Sundararaman
Ping Wang
Song Kim
Wen-Jay Hsu
Heechoul Park
G. Levinsky
Jiejun Lu
M. Chirania
Raymond A. Heald
P. Lazar
S Dharmasena
Show All
Source
Cite
Save
Citations (11)
1