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Romesh Kumar Nandwana
Romesh Kumar Nandwana
Cisco Systems, Inc.
Electronic engineering
Computer science
CMOS
Phase noise
Jitter
4
Papers
22
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A 16-Gb/s -11.6-dBm OMA Sensitivity 0.7-pJ/bit Optical Receiver in 65-nm CMOS Enabled by Duobinary Sampling
2021
IEEE Journal of Solid-state Circuits
Mostafa G. Ahmed
Dongwook Kim
Romesh Kumar Nandwana
Ahmed Elkholy
Kadaba Lakshmikumar
Pavan Kumar Hanumolu
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A 2.5-5.75-GHz Ring-Based Injection-Locked Clock Multiplier With Background-Calibrated Reference Frequency Doubler
2019
IEEE Journal of Solid-state Circuits
Ahmed Elkholy
Daniel Coombs
Romesh Kumar Nandwana
Ahmed Elmallah
Pavan Kumar Hanumolu
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A Process and Temperature Insensitive CMOS Linear TIA for 100 Gb/s/λ PAM-4 Optical Links
2019
IEEE Journal of Solid-state Circuits
Kadaba Lakshmikumar
Alexander Kurylak
Manohar Nagaraju
Richard Booth
Romesh Kumar Nandwana
Joe Pampanin
Vito Boccuzzi
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Citations (7)
A 5GHz Digital Fractional- $N$ PLL Using a 1-bit Delta–Sigma Frequency-to-Digital Converter in 65 nm CMOS
2017
IEEE Journal of Solid-state Circuits
Mrunmay Talegaonkar
Tejasvi Anand
Ahmed Elkholy
Amr Elshazly
Romesh Kumar Nandwana
Saurabh Saxena
Brian Young
Woo Seok Choi
Pavan Kumar Hanumolu
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Citations (5)
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