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K. Y. Lim
K. Y. Lim
SEMATECH
Electronic engineering
Oxide
Quantum tunnelling
Noise measurement
Logic gate
5
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38
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Charge loss in TANOS devices caused by Vt sensing measurements during retention
2010
IMW | International Memory Workshop
Hokyung Park
G. Bersuker
D. C. Gilmer
K. Y. Lim
Minseok Jo
Hyunsang Hwang
Andrea Padovani
Luca Larcher
Paolo Pavan
W. Taylor
P. D. Kirsch
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Citations (9)
Tunnel oxide degradation in TANOS devices and its origin
2010
VLSIT | Symposium on VLSI Technology
Hokyung Park
Gennadi Bersuker
Minseok Jo
D. Veksler
K. Y. Lim
D. C. Gilmer
Niti Goel
C. Y. Kang
Chadwin D. Young
Man Chang
Hyunsang Hwang
H-H. Tseng
P. D. Kirsch
R. Jammy
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Citations (3)
Understanding noise measurements in MOSFETs: the role of traps structural relaxation
2010
IRPS | International Reliability Physics Symposium
D. Veksler
G. Bersuker
S. L. Rumyantsev
M. S. Shur
Hokyung Park
Chadwin D. Young
K. Y. Lim
W. Taylor
R. Jammy
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Citations (19)
Impact of plasma gate reoxidation on the non-volatile charge trap memory device
2010
IMW | International Memory Workshop
D. C. Gilmer
K. Y. Lim
Hokyung Park
C. S. Park
Niti Goel
P. D. Kirsch
R. Jammy
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Citations (1)
The critical role of the defect structural relaxation for interpretation of noise measurements in MOSFETs
2009
IIRW | International Integrated Reliability Workshop
D. Veksler
G. Bersuker
Hokyung Park
Chadwin D. Young
K. Y. Lim
W. Taylor
S. Lee
H. Shin
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Citations (6)
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