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Youn Sung Choi
Youn Sung Choi
Texas Instruments
Electronic engineering
Silicon
MOSFET
Physics
Strain (chemistry)
4
Papers
41
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DISPOSITIFS DE TRANSISTOR À EFFET DE CHAMP (FET) EMPLOYANT UNE DISPOSITION DE LARGEUR DE GRILLE ACTIVE/GRILLE FACTICE ASYMÉTRIQUE ADJACENTE
2018
Youn Sung Choi
Ukjin Roh
Shashank Ekbote
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Practical implications of via-middle Cu TSV-induced stress in a 28nm CMOS technology for Wide-IO logic-memory interconnect
2012
VLSIT | Symposium on VLSI Technology
J. West
Youn Sung Choi
C Vartuli
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Pocket Implant-Dependent Channel Mobility in Advanced p-MOSFETs With Strain Engineering
2011
IEEE Electron Device Letters
Youn Sung Choi
Shashank S. Ekbote
Greg C. Baldwin
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Layout Variation Effects in Advanced MOSFETs: STI-Induced Embedded SiGe Strain Relaxation and Dual-Stress-Liner Boundary Proximity Effect
2010
IEEE Transactions on Electron Devices
Youn Sung Choi
Guoda Lian
C Vartuli
Oluwamuyiwa Oluwagbemiga Olubuyide
Jayhoon Chung
Deborah J. Riley
Greg C. Baldwin
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Citations (16)
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