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Y. Takatsukasa
Y. Takatsukasa
Kyoto University
Computer science
Nanometre
Application-specific integrated circuit
Parallel computing
Field-programmable gate array
2
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2
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0
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MN-Core - A Highly Efficient and Scalable Approach to Deep Learning
2021
VLSIC | Symposium on VLSI Circuits
K. Namura
J.-M. Kuhn
T. Adachi
H. Imachi
H. Kaneko
T Kato
G. Watanabe
N Tanaka
S. Kashihara
H. Miyashita
Y Tomonaga
R. Okuta
T Akiba
B. Vogel
S. Kitajo
F. Osawa
K. Takahashi
Y. Takatsukasa
K. Mizumaru
T. Yamauchi
J Ono
A. Takahashi
T. Ahmed
Y. Doi
K. Hiraki
Junichiro Makino
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A Yield and Speed Enhancement Technique Using Reconfigurable Devices Against Within-Die Variations on the Nanometer Regime
2006
FPL | Field-Programmable Logic and Applications
Kazutoshi Kobayashi
Manabu Kotani
Kazuya Katsuki
Y. Takatsukasa
K. Ogata
Yuuri Sugihara
Hidetoshi Onodera
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