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Mao-Chih Hsia
Mao-Chih Hsia
National Chiao Tung University
Computer science
Real-time computing
Electronic engineering
CMOS
Static random-access memory
3
Papers
7
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0
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High-performance 0.6V V MIN 55nm 1.0Mb 6T SRAM with adaptive BL bleeder
2012
ISCAS | International Symposium on Circuits and Systems
Hao-I Yang
Yi-Wei Lin
Mao-Chih Hsia
Geng-Cing Lin
Chi-Shin Chang
Yin-Nien Chen
Ching-Te Chuang
Wei Hwang
Shyh-Jye Jou
Nan-Chun Lien
Hung-Yu Li
Kuen-Di Lee
Wei-Chiang Shih
Ya-Ping Wu
Wen-Ta Lee
Chih-Chiang Hsu
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Citations (1)
A 55nm 0.5V 128Kb cross-point 8T SRAM with data-aware dynamic supply Write-assist
2012
SoCC | Symposium on Cloud Computing
Yung-Wei Lin
Hao-I Yang
Mao-Chih Hsia
Yi-Wei Lin
Chien-Hen Chen
Ching-Te Chuang
Wei Hwang
Nan-Chun Lien
Kuen-Di Lee
Wei-Chiang Shih
Ya-Ping Wu
Wen-Ta Lee
Chih-Chiang Hsu
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A high-performance low V MIN 55nm 512Kb disturb-free 8T SRAM with adaptive VVSS control
2011
SoCC | Symposium on Cloud Computing
Hao-I Yang
Shih-Chi Yang
Mao-Chih Hsia
Yung-Wei Lin
Yi-Wei Lin
Chien-Hen Chen
Chi-Shin Chang
Geng-Cing Lin
Yin-Nien Chen
Ching-Te Chuang
Wei Hwang
Shyh-Jye Jou
Nan-Chun Lien
Hung-Yu Li
Kuen-Di Lee
Wei-Chiang Shih
Ya-Ping Wu
Wen-Ta Lee
Chih-Chiang Hsu
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Citations (3)
1