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Cheng–Hong Li
Cheng–Hong Li
Columbia University
Real-time computing
System on a chip
Computer science
Embedded system
Logic gate
5
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51
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COSMIC: middleware for high performance and reliable multiprocessing on xeon phi coprocessors
2013
| International Symposium on High Performance Distributed Computing
Srihari Cadambi
Giuseppe Coviello
Cheng–Hong Li
Rajat Phull
Kunal Rao
Murugan Sankaradass
Srimat Chakradhar
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Exploiting local logic structures to optimize multi-core SoC floorplanning
2010
DATE | Design, Automation, and Test in Europe
Cheng–Hong Li
Sampada Sonalkar
Luca P. Carloni
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Leveraging Local Intracore Information to Increase Global Performance in Block-Based Design of Systems-on-Chip
2009
IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems
Cheng–Hong Li
Luca P. Carloni
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Design, Implementation, and Validation of a New Class of Interface Circuits for Latency-Insensitive Design
2007
MEMOCODE | International Conference on Formal Methods and Models for Co-Design
Cheng–Hong Li
Rebecca L. Collins
Sampada Sonalkar
Luca P. Carloni
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Citations (28)
Using functional independence conditions to optimize the performance of latency-insensitive systems
2007
ICCAD | International Conference on Computer Aided Design
Cheng–Hong Li
Luca P. Carloni
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Citations (9)
1