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Sijia Wang
Sijia Wang
Broadcom
Electronic engineering
Computer science
Electrical engineering
CMOS
Transceiver
5
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106
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26.3 An 800MS/S 10b/13b receiver for 10GBASE-T Ethernet in 28nm CMOS
2015
ISSCC | International Solid-State Circuits Conference
Jan Mulder
Davide Vecchi
Yi Ke
Stefano Bozzola
Mark Taylor Core
Nitz Saputra
Qiongna Zhang
Jeff Riley
Han Yan
Mattia Introini
Sijia Wang
Christopher M. Ward
Jan R. Westra
Jiansong Wan
Klaas Bult
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Citations (6)
11.4 A 1.5mW 68dB SNDR 80MS/s 2× interleaved SAR-assisted pipelined ADC in 28nm CMOS
2014
ISSCC | International Solid-State Circuits Conference
Frank M. L. van der Goes
Christopher M. Ward
Santosh Astgimath
Han Yan
Jeff Riley
Jan Mulder
Sijia Wang
Klaas Bult
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Citations (31)
Design considerations for low-power analog front ends in full-duplex 10GBASE-T transceivers
2014
CICC | Custom Integrated Circuits Conference
Jan R. Westra
Jan Mulder
Yi Ke
Davide Vecchi
Xiaodong Liu
Erol Arslan
Jiansong Wan
Qiongna Zhang
Sijia Wang
Frank M. L. van der Goes
Klaas Bult
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Citations (1)
A 1.5 mW 68 dB SNDR 80 Ms/s 2 × Interleaved Pipelined SAR ADC in 28 nm CMOS
2014
IEEE Journal of Solid-state Circuits
Frank M. L. van der Goes
Christopher M. Ward
Santosh Astgimath
Han Yan
Jeff Riley
Zeng Zeng
Jan Mulder
Sijia Wang
Klaas Bult
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Citations (62)
8.5 A sub-1.75W full-duplex 10GBASE-T transceiver in 40nm CMOS
2014
ISSCC | International Solid-State Circuits Conference
Jan R. Westra
Jan Mulder
Yi Ke
Davide Vecchi
Xiaodong Liu
Erol Arslan
Jiansong Wan
Qiongna Zhang
Sijia Wang
Frank M. L. van der Goes
Klaas Bult
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Citations (6)
1