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Jack Liu
Jack Liu
TSMC
Electronic engineering
Computer science
CMOS
Clock skew
Skew
2
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2
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An approach to embedding traditional non-volatile memories into a deep sub-micron CMOS
2020
VLSIT | Symposium on VLSI Technology
Lin Ching-Hui
W.T. Huang
Allan Huang
Yang Yi
Ying-Chih Hsu
S.K. Yang
Jack Liu
H.W. Tseng
Jarcle Huang
B.Y. Chou
Kevin Huang
W.K. Chang
Daniel Chang
Chao-Hsin Chien
Harry Yeh
P.W. Liu
C.D. Hsieh
Harry Chuang
Alexander Kalnitsky
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A 4GHz clock distribution architecture using subharmonically injection-locked coupled oscillators with clock skew calibration in 16nm CMOS
2017
VLSIC | Symposium on VLSI Circuits
Lan-Chou Cho
Feng-Wei Kuo
Ron Chen
Jack Liu
Chewn-Pu Jou
Fu-Lung Hsueh
R. Bogdan Staszewski
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