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B. Pulicherla
B. Pulicherla
TSMC
Switching time
Static random-access memory
Subthreshold slope
CMOS
Threshold voltage
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先進FinFETのための電力性能信頼性ブースタとしての冷CMOS【JST・京大機械翻訳】
2020
H.-L. Chiang
T.C. Chen
J. F. Wang
S. Mukhopadhyay
W.-K. Lee
C L Chen
W. S. Khwa
B. Pulicherla
P. J. Liao
K. W. Su
K.F. Yu
T. Wang
Carlos H. Diaz
J. Cai
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