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H.D. Ban
H.D. Ban
Logic gate
Capacitor
Physics
Dielectric
Electronic engineering
1
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5
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A new planar stacked technology (PST) for scaled and embedded DRAMs
1996
IEDM | International Electron Devices Meeting
Sang-pil Sim
W S Lee
Y.S. Ohu
H.C. Choe
J H Kim
H.D. Ban
I.C. Kim
Y.H. Chang
Y.-J Lee
H. K. Kang
U. I. Chung
C S Choi
C.G. Hwang
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Citations (5)
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