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Thomas Fröhnel
Thomas Fröhnel
IBM
Electronic engineering
Logic gate
Cycles per instruction
Static random-access memory
Low-power electronics
2
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1
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0
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The Design and Characterization of a Half-Volt 32 nm Dual-Read 6T SRAM
2011
IEEE Transactions on Circuits and Systems
Jente B. Kuang
Jeremy D. Schaub
Fadi H. Gebara
Dieter Wendel
Thomas Fröhnel
Sudesh Saroop
Sani R. Nassif
Kevin J. Nowka
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A 32nm 0.5V-supply dual-read 6T SRAM
2010
CICC | Custom Integrated Circuits Conference
Jente B. Kuang
Jeremy D. Schaub
Fadi H. Gebara
Dieter Wendel
Sudesh Saroop
Tuyet Nguyen
Thomas Fröhnel
Antje Müller
Christopher M. Durham
Rolf Sautter
Bryan J. Lloyd
Bryan J. Robbins
Juergen Pille
Sani R. Nassif
Kevin J. Nowka
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