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Brian L. Walsh
Brian L. Walsh
IBM
Electronic engineering
Silicon on insulator
Engineering
System on a chip
eDRAM
5
Papers
16
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45nm Yield model optimization
2011
ASMC | Advanced Semiconductor Manufacturing Conference
Brian L. Walsh
John Z. Colt
Daniel J. Poindexter
Thomas W. Joseph
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Testing the IBM Power 7™ 4 GHz eight core microprocessor
2010
ITC | International Test Conference
James M. Crafts
David C. Bogdan
Dennis R. Conti
Donato O. Forlenza
Orazio P. Forlenza
William V. Huott
Mary P. Kusko
Edward Michael Seymour
Timothy Taylor
Brian L. Walsh
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Device-design metrics to improve manufacturability
2010
ASMC | Advanced Semiconductor Manufacturing Conference
Kirk D. Peterson
Ron Logan
Xiaojun Yu
Kevin K. Dezfulian
Greg Bazan
Jon Winslow
N. Zamdmer
Lenny Dubuque
Brian L. Walsh
Andrew H. Norfleet
Fran Clougherty
Ben Bayat
Anda C. Mocuta
Ken Rim
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A simple and high-performance 130 nm SOI eDRAM technology using floating-body pass-gate transistor in trench-capacitor cell for system-on-a-chip (SoC) applications
2003
IEDM | International Electron Devices Meeting
Mahender Kumar
Michael D. Steigerwalt
Brian L. Walsh
T.L. Doney
D. Wildrick
Karen A. Bard
David M. Dobuzinsky
P. McFarland
C.E. Schiller
Brian W. Messenger
S.E. Rathmill
A.R. Gasasira
Paul C. Parries
S. S. Iyer
S.E. Chaloux
Herbert L. Ho
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A 0.13 /spl mu/m high-performance SOI logic technology with embedded DRAM for system-on-a-chip application
2001
IEDM | International Electron Devices Meeting
Herbert L. Ho
Michael D. Steigerwalt
Brian L. Walsh
T.L. Doney
D. Wildrick
P. McFarland
J. Benedict
Karen A. Bard
Denise Pendleton
Junedong Lee
S.L. Maurer
B. Corrow
D.K. Sadana
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Citations (9)
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