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Manish Garg
Manish Garg
Qualcomm
Electronic engineering
Static random-access memory
Electrical engineering
Voltage
Humanities
4
Papers
17
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Décaleurs de niveau de tension utilisant des circuits de préconditionnement, et systèmes et procédés connexes
2016
Rahul Krishnakumar Nadkarni
Stephen Edward Liles
Manish Garg
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Non-Gaussian distribution of SRAM read current and design impact to low power memory using Voltage Acceleration Method
2011
VLSIT | Symposium on VLSI Technology
Joseph Wang
Ping Liu
Yandong Gao
Pankaj Deshmukh
Sam Yang
Ying Chen
Wing Sy
Lixin Ge
Esin Terzioglu
Mohamed Hassan Abu-Rahma
Manish Garg
Sei-Seung Yoon
Michael Han
Mehdi Hamidi Sani
Geoffrey Yeap
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A dual core oxide 8T SRAM cell with low Vccmin and dual voltage supplies in 45nm triple gate oxide and multi Vt CMOS for very high performance yet low leakage mobile SoC applications
2010
VLSIT | Symposium on VLSI Technology
Ping Liu
Joseph Wang
Michael Phan
Manish Garg
Ron Zhang
Amer Cassier
Lew G. Chua-Eoan
Boris Andreev
Sebastien Weyland
Shashank Ekbote
Michael Han
J. Fischer
Geoffrey Yeap
Ping-Wei Wang
Quincy Li
C.S. Hou
S.B. Lee
Y.F. Wang
Shyue-Shyh Lin
M. Cao
Y. J. Mii
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Element de stockage séquentiel a double voie, multimodes
2007
Manish Garg
Fadi Adel Hamdan
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