Circular geometry transistors fabricated on germanium-on-alumina bonded substrates

Germanium(Ge) has attractive properties such as high carrier mobility, compatibility with high-K dielectrics, and lattice matched for GaAs growth. Germanium on insulator (GOI) (1) offers the advantages of germanium and combines them with those of silicon on insulator (SOI). Bonding to substrates which are thermally matched to Ge eases process temperature constraints and can have additional benefits depending on the substrate used. Transistors have previously been reported on a germanium on sapphire wafer bonded platform (2). Fine grain alumina offers a cheaper alternative to sapphire while still retaining advantages such as low substrate losses and better crosstalk suppression. In this work Circular Geometry MOS transistors fabricated and tested on germanium bonded to a fine grain alumina substrate (superstrate 997) are presented. The Ge on Alumina substrate was realised by bonding a polysilicon coated and subsequently planarised alumina substrate to a Umicore 2.7-2.9 ohmcm n-Ge substrate(3). After subsequent bond strength annealing at 150 C the Ge was thinned by precision in-house grinding and diamond particulate polishing leaving a thick 100μm Ge on Alumina layer. The ground and polished substrate is shown in figure 1. Circular geometry transistors were fabricated using a low temperature self aligned W gate fabrication process. The maximum temperature seen by the transistors was 450 C. The transistors having a W/L of 9 also employed a 20nm APCVD silicon dioxide layer as the gate dielectric. As a direct comparison identical transistors where fabricated on bulk Ge substrates with the same resistivity as the bonded structure. Figure 2 shows the resultant output characteristics obtained from both the bulk Ge device (2(a)) and the Ge on Alumina device (2(b)). As can be seen the bulk Ge showed better transistor characteristics exhibiting an effective mobility of 480 cm/Vs compared to 150cm/Vs. The Ge on Alumina substrate also shows significant series resistance. The decline in device performance was thought to be due to the poor surface roughness of the Ge on Al layer after polishing. It was found that by the addition of NaOCL into the polish process an improvement in the surface roughness of germanium was achieved from 2.5nm to 0.8nm.. Subsequently transistors fabricated on the improved reworked Ge layer produced improved characteristics comparable to those obtained in bulk Ge. Characteristics shown in figure 3 exhibit an effective mobility of 414 cm/Vs Low temperature investigation of the transistor operation on the Ge on Al devices was carried out over a range of temperatures from room temperature to 173 K on transistors having a W/L of 9. A MDC model 441 cryogenic probe station in combination with Agilent B1500 parameter analyser was employed for low temperature measurement. Device characteristics were seen to improve with an increase in effective mobility (μeff) and decrease in Sub threshold slope (S) observed with decreasing temperature. The improvement in transistor effective mobility is shown in figure 4. Table 1 offers a summary of the change in device characteristics with decreasing temperature.