Electromagnetic Compatibility in Leakage Current of CMOS Integrated Circuits

This paper presents an analytical model that predicts and characterizes the impact of Electromagnetic Interference (EMI) on the leakage current of CMOS integrated circuits. It is shown that the rate of increase in leakage current follows the modified Bessel function, which can be estimated using only a few primitive device parameters. Unlike other device and circuit parameters, leakage current is very sensitive to EMI, where only a few hundred millivolts of noise can increase the leakage current by a factor of 1000. The developed analytical model is successfully compared against measurement data from CMOS inverters fabricated using various TSMC’s standard CMOS processes, including 180 nm, 130 nm, and 65 nm. Based on the predictive model and experimental data, we show that the impact of EMI on the leakage current of CMOS integrated circuits is independent of technology scaling.