Old Web
English
Sign In
Acemap
>
Paper
>
Plasma Etching Challenges for Porous SiOCH Integration In Advanced Interconnect Levels
Plasma Etching Challenges for Porous SiOCH Integration In Advanced Interconnect Levels
2011
T. Chevolleau
F. Chave
T. David
N. Posseme
L. Vallier
Erwine Pargon
M. Darnon
F. Bailly
O. Joubert
R. Bouyssou
Sebastien Barnola
Julien Ducoté
P. Gouraud
C. Verove
Keywords:
Plasma etching
Materials science
Composite material
Porosity
Optoelectronics
Interconnection
Correction
Source
Cite
Save
Machine Reading By IdeaReader
0
References
0
Citations
NaN
KQI
[]