Analysis and measurement of chip current imbalances caused by the structure of bus bars in an IGBT module

Chip current imbalances caused by the structure of bus bars in an insulated gate bipolar transistor (IGBT) module were analyzed using the three-dimensional finite element method (3D-FEM). To confirm the results of the analysis we also measured the current of each parallel circuit using a test module. The results of the analysis were in good agreement with the experimental results. The 3D-FEM analysis was therefore used to design a new structure of bus bars in a module and the analysis results of the good current sharing was presented.