EMI evaluation of a differential signaling interconnect at 3.2 Gbps

Differential signaling scheme has the inherent advantages of low electromagnetic interference (EMI) profile at multi-gigabits/s data rates. However, it is challenging to quantify the exact amount of EMI improvement due to the presence of other EMI sources in a realistic system. In this paper, we quantified the EMI benefit of a differential signaling system by using a test board characterized in a semianechoic chamber with pre-scan measurements. The test board contains an XDR/spl trade/ memory channel which uses differential signaling at 3.2 Gbps for data and single-ended signaling at 800 Mbps for command and address. It is measured in various operating modes and data patterns to differentiate the emissions from different sources such as clock nets, single ended signals, and differential signals. In addition, a near-field scanner is used to locate the EMI sources and/or antennas. The clock net is found to be the dominant source of EMI and the controller socket acted as the major EMI antenna. The high-speed differential data lines contribute to less than 1 dB of the overall EMI.