Low Power Reversible Parallel and Serial Binary Adder/Subtractor

Each and every day new technology is being established which is miniaturized and challenging the low power than existing design. All the gates used in the design is reversible to achieve low power and less complexity. In past few decades reversible enlarges its applications in modern computing environment. Reversible gates can be executed using any Boolean function. In a modern computing environment adders plays important role for addition process as well as for subtraction. This paper proposes a modified reversible parallel and serial adder/subtraction circuit using Dual Key Gate (DKG) and SG gate. The performance of parallel adder/subtractor circuit design using dual key gate and serial adder/subtractor using dual key gate with SG gate is simulated and synthesized using Xilinx. The performance of this circuit is compared with existing design using Feynman gate and toffoli gate based on complexity, low power and Garbage input/outputs.