Feasibility Study of Solid-phase Epitaxial Regrowth (SPER) as an Ultra-shallow Junction (USJ) Technology for High-performance CMOS Devices

The solid-phase epitaxial regrowth (SPER) junction technologies focusing on high-performance device applications have been investigated. It is found that poly-depletion during SPER and subsequent sidewall (SW) formation with disposable sidewall (DSW) flow was significant but it could be effectively suppressed by applying low-temperature SW process. Junction leakage current was also decreased by optimizing the location of the region of end-of-range (EOR) defects. We have also demonstrated that gate-extension overlap length can be controlled by tilted extension implantation. Moreover, we obtained drive currents of 650/350 A/m at I off = 100 nA/m for both N- and PFET, respectively, with excellent PFET's roll-off characteristics. Although, SPER doesn't outperform conventional sRTA at this point, there is a room for optimization and further SPER specific profile optimization will boost the performance. Therfore, this diffusion-less junction technology with extremely low thermal budget is very promising for further scaling of CMOSFETs