An energy-efficient nonvolatile microprocessor considering software-hardware interaction for energy harvesting applications

2016 
Normally-off computing (NoC) systems have constantly-off and instantly-on characteristics, leading to considerably lower idle power consumption than other low-power systems. This paper proposes a software procedure and two system hardware design optimization methods, namely a programmable restore entry decision for increasing system recovery correctness and nonvolatile (NV) storage reduction with selective backup system states and selective store. Thus, NV microprocessors (NV-μPs) can reduce the energy and area overhead. The proposed NV-μP uses a 90-nm MSP430-compatible μP embedded with resistive random-access memory. The proposed NV-μP was compared with three state-of-the-art NV-μP methods: full replacement, parallel compare and compress codec, and NV logic array. Compared with the three methods, the proposed software procedure significantly increased the restore correctness to achieve 100% stability for realistic electrocardiography applications. Regarding hardware, the system store energy was reduced by at least 23.7%, compared with the three approaches. In contrast to the full replacement approach, the area overhead was reduced by 42%.
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