Monolithic silicon photonics at 25 Gb/s

Jason S. Orcutt,Douglas M. Gill,Jonathan E. Proesel,John J. Ellis-Monaghan,Folkert Horst,Tymon Barwicz,Chi Xiong,Frederick G. Anderson,Ankur Agrawal,Yves Martin,Christian W. Baks,Marwan H. Khater,Jessie Rosenberg,Wesley D. Sacher,Jens Hofrichter,Edward W. Kiewra,Andreas D. Stricker,Frank R. Libsch,Bert Jan Offrein,Mounir Meghelli,Natalie B. Feilchenfeld,Wilfried Haensch,William M. J. Green

Monolithic silicon photonics at 25 Gb/s

2016

Monolithic CMOS photonics seeks to minimize total transceiver cost by simplifying packaging, design and test. Here we examine 25 Gb/s applications in the context of integrated transistor performance and demonstrate a 4λ×25 Gb/s reference design.

Keywords:

Silicon photonics
CMOS
Photonics
Reference design
Systems design
Transistor
Electronic engineering
Electrical engineering
Engineering
coarse wavelength division multiplexing
Transceiver

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