A high-performance CMOS technology for very fast static RAMs
1986
An advanced twin-tub, double-polysilicon, dual-metal CMOS technology with 1 µm channel transistors is developed. This technology has been used to produce a high-performance 22 ns 256K (32K × 8) static RAM. In addition to aggressive scaling, the process has been designed with emphasis on device reliability and production-worthiness to warrant high manufacturing yield. The scalability of the present technology for SRAMs of next generation is also discussed.
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