An Energy Efficient Computing-in-Memory Accelerator with 1T2R Cell and Fully Analog Processing for Edge AI Applications

For computing-in-memory (CIM) in edge applications, raising the weight precision is an effective approach to improve the performance of neural networks (NN). However, high precision calls for more memory resources for weight storage and complex mixed-signal interface circuits for data processing. In this work, a ReRAM-based energy-efficient CIM accelerator is presented with two techniques to solve the above-mentioned problems. Firstly, a circuit-algorithm co-design scheme is proposed to realize fully analog processing, which helps to improve both the energy efficiency and the throughput of network. To deal with the I-V nonlinearity of ReRAM, we propose a nonlinear-aware training algorithm to improve the accuracy of network. Secondly, a smaller 1T2R cell is proposed to replace traditional 2T2R for weight storage with 35 28nm neural network with two fully connected layers and one ReLU layer is built for the MNIST dataset. The error rate can be reduced by >46 the energy efficiency is 99 TOPS/W at 200 MHz, >2.6X improvement over the conventional digital method.