A process for producing semiconductor devices with metal replacement gate

A method of polishing for forming of structures with metal replacement gate, comprising: a first chemical mechanical polishing step to remove excess material and planarizing an uppermost layer so as to leave a planarized thickness over a gate structure; a second chemical mechanical polishing step comprising removal of the planarized thickness by uniformly polishing and thereby removing the top layer and exposing an underlying covered surface of a dielectric of the gate structure with a polishing agent, so that a planar topography is reached; and a third chemical mechanical polishing step to remove the dielectric from the gate structure and expose a gate conductor.