X-Tolerant Compactor maXpress for In-System Test Applications With Observation Scan

Hybrid test schemes comprising on-chip test compression and logic built-in self-test are expected to play a pivotal role in the design of new integrated circuits and delivering high quality tests. As architectural differences between these two paradigms are gradually blurring, and both schemes efficiently share test logic, they become more vulnerable to unknown (X) states whose sources vary from uninitialized memory elements to unwrapped-for-test analog modules. Typically, X values degrade test results, and thus test response compaction schemes must be duly protected. This article presents maXpress—an X-tolerant tunable compactor deploying a new scan chain selection mechanism capable of completely masking X states, as required by many in-system or one-directional streaming test applications, within redefinable groups of scan chains and designated scan shift cycles. The proposed scheme is also supporting separate observation scan chains that, in contrast to conventional scan, capture faulty effects every shift cycle, while their content is gradually shifted into a compactor shared with the remaining chains. In addition to a new layout-friendly architecture, the article proposes algorithms to automate maXpress control settings based on scan chain selection rules deployed to suppress X states. Experimental results obtained for industrial designs show feasibility and efficiency of the proposed scheme altogether with actual impact of X-masking on a resultant test coverage and test pattern counts.