MNSIM-TIME: Performance Modeling Framework for Training-In-Memory Architectures

Emerging memristors and Processing-In-Memory (PIM) architectures have shown powerful capabilities in improving the computing energy efficiency of neural network (NN) algorithms. Existing work has proposed the memristor-based NN training architecture [2], which can improve more than 10x energy efficiency improvement compared with CMOS-based solutions. In this paper, we propose a behavior-level modeling framework for memristor-based training-in-memory architectures, called MNSIM-TIME. Compared with existing modeling tools, MNSIMTIME supports configurable architecture design and fast hardware performance modeling, which helps researchers to realize efficient design space exploration in the early architecture design stage.