Void Shape Evolution of Silicon: Level-Set Approach

Introduction: The void shape evolution of silicon is a process where trenches etched on silicon are transformed into different shaped empty spaces in silicon when the sample is thermally annealed at high temperatures (~1100°C) in a non-oxidizing atmosphere [1-2]. The arrangement of the initial trenches leads to different final geometrical outputs where, in some cases, coalescence between neighboring trenches occurs. The objective of this work is to represent these topological transformations with the highest possible accuracy through simulations. Results: The following figures consistently represent an evolution similar to those in literature while being able to simulate the coalescence (not possible before with the ALE method):