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Tse-Wei Wu
Tse-Wei Wu
National Chiao Tung University
Computer science
Electronic engineering
Fault model
Real-time computing
Automatic test pattern generation
2
Papers
15
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Layout-Based Dual-Cell-Aware Tests.
2019
VTS | VLSI Test Symposium
Tse-Wei Wu
Dong-Zhen Lee
Yu-Hao Huang
Mango C.-T. Chao
Kai-Chiang Wu
Shu-Yi Kao
Ying-Yen Chen
Po-Lin Chen
Mason Chern
Jih-Nung Lee
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Citations (1)
Methodology of generating dual-cell-aware tests
2017
VTS | VLSI Test Symposium
Yu-Hao Huang
Ching-Ho Lu
Tse-Wei Wu
Yu-Teng Nien
Ying-Yen Chen
Max Wu
Jih-Nung Lee
Mango Chia-Tso Chao
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Citations (14)
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