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S. Tomishima
S. Tomishima
Dram
Parallel computing
Computer science
Electronic engineering
Embedded system
4
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6
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Physically Unclonable Functions with Voltage-Controlled Magnetic Tunnel Junctions
2020
IEEE Transactions on Magnetics
Y. Tanaka
Minori Goto
A. K. Shukla
K. Yoshikawa
H. Nomura
Shinji Miwa
S. Tomishima
Yoshishige Suzuki
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A 1.0V 230MHz column access embedded DRAM macro with dual interface and triple test functions for portable MPEG applications
2001
S. Tomishima
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0.13um 32Mb/64Mb embedded DRAM core with high efficient redundancy and enhanced testability
2001
ESSCIRC | European Solid-State Circuits Conference
Hirohito Kikukawa
S. Tomishima
T Tsuji
Toshiaki Kawasaki
S. Sakamoto
Masatoshi Ishikawa
Wataru Abe
Hiroaki Tanizaki
Hiroshi Kato
T. Uchikoba
T. Inokuchi
Manabu Senoh
Y. Fukushima
Mitsutaka Niiro
Masanao Maruta
Akinori Shibayama
Tsukasa Ooishi
Kazunari Takahashi
Hideto Hidaka
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A Long Data Retention SOI DRAM with the Body Refresh Function
1997
IEICE Transactions on Electronics
S. Tomishima
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Citations (4)
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