Old Web
English
Sign In
Acemap
>
authorDetail
>
Roberto DiCecco
Roberto DiCecco
Intel
Field-programmable gate array
Deep learning
Artificial intelligence
Computer science
Compiler
3
Papers
46
Citations
0.00
KQI
Citation Trend
Filter By
Interval:
1900~2024
1900
2024
Author
Papers (3)
Sort By
Default
Most Recent
Most Early
Most Citation
No data
Journal
Conference
Others
DLA: Compiler and FPGA Overlay for Neural Network Inference Acceleration
2018
FPL | Field-Programmable Logic and Applications
Mohamed S. Abdelfattah
David Han
Andrew Bitar
Roberto DiCecco
Shane O'Connell
Nitika Shanker
Joseph Chu
Ian Prins
Joshua David Fender
Andrew C. Ling
Gordon Raymond Chiu
Show All
Source
Cite
Save
Citations (35)
DLA: Compiler and FPGA Overlay for Neural Network Inference Acceleration
2018
FPL | Field-Programmable Logic and Applications
Mohamed S. Abdelfattah
David Han
Andrew Bitar
Roberto DiCecco
Shane OConnell
Nitika Shanker
Joseph Chu
Ian Prins
Joshua Fender
Andrew C. Ling
Gordon Raymond Chiu
Show All
Source
Cite
Save
Citations (10)
Harnessing Numerical Flexibility for Deep Learning on FPGAs
2018
Heart
Andrew C. Ling
Mohamed S. Abdelfattah
Shane OConnell
Andrew Bitar
David Han
Roberto DiCecco
Suchit Subhaschandra
Chris N. Johnson
Dmitry Denisenko
Joshua Fender
Gordon Raymond Chiu
Show All
Source
Cite
Save
Citations (1)
1