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Yueh-Hsin Chen
Yueh-Hsin Chen
Microchip Technology
Electronic engineering
Computer science
Non-volatile memory
Parallel computing
Logic gate
3
Papers
9
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0
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A 55 nm Logic-Process-Compatible, Split-Gate Flash Memory Array Fully Demonstrated at Automotive Temperature with High Access Speed and Reliability
2015
IMW | International Memory Workshop
Nhan Do
Latt Tee
S. Hariharan
Steven Lemke
Mandana Tadayoni
Will Yang
Man-Tang Wu
Jinho Kim
Yueh-Hsin Chen
Chien-Sheng Su
Vipin Tiwari
Stephen Zhou
Rodger Qian
Ian Yue
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Structure de grille à empilement auto-aligné utilisable dans une matrice de mémoire non volatile
2013
Willem-Jan Toren
Xian Liu
Gerhard Metzger-Brueckl
Nhan Do
Stephan Wege
Nadia Miridi
Chien-Sheng Su
Cecile Bernardi
Liz Cuevas
Florence Guyot
Yueh-Hsin Chen
Henry Om'mani
Mandana Tadayoni
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Split-Gate Flash MLC with Self-limiting Programming
2008
VLSI-TSA | International Symposium on VLSI Technology, Systems, and Applications
James Yingbo Jia
Douglas Lee
Yueh-Hsin Chen
Chien-Sheng Su
Bomy Chen
Shih-Wei Wang
C.J. Shieh
Allan Huang
Yi-Shin Chu
Jen-Sheng Yang
Derek Lin
Yung-Tao Lin
Chung Wang
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