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Yi-Hsien Lue
Yi-Hsien Lue
National Chiao Tung University
Oxide
Electronic engineering
Quantum tunnelling
Electrical engineering
Band gap
3
Papers
15
Citations
0
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Reliability study of MANOS with and without a SiO 2 buffer layer and BE-MANOS charge-trapping NAND flash devices
2009
VLSI-TSA | International Symposium on VLSI Technology, Systems, and Applications
Chien-Wei Liao
Sheng-Chih Lai
Hang-Ting Lue
Ming-Jui Yang
Chin-Yen Shen
Yi-Hsien Lue
Yu-Fong Huang
Jung-Yu Hsieh
Szu-Yu Wang
Guang-Li Luo
Chao-Hsin Chien
Kuang Yeu Hsieh
Rich Liu
Chih-Yuan Lu
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Citations (6)
An Oxide-Buffered BE-MANOS Charge-Trapping Device and the Role of Al2O3
2008
International Memory Workshop
Sheng-Chih Lai
Hang-Ting Lue
Chien-Wei Liao
Yu-Fong Huang
Ming-Jui Yang
Yi-Hsien Lue
Tai-Bor Wu
Jung-Yu Hsieh
Szu-Yu Wang
Shih-Ping Hong
Fang Hao Hsu
Chih-Yen Shen
Guang-Li Luo
Chao-Hsin Chien
Kuang Yeu Hsieh
Rich Liu
Chih-Yuan Lu
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Citations (9)
Highly Reliable MA BE-SONOS (Metal-Al 2 O 3 Bandgap Engineered SONOS) Using a SiO 2 Buffer Layer
2008
VLSI-TSA | International Symposium on VLSI Technology, Systems, and Applications
Sheng-Chih Lai
Hang-Ting Lue
Chien-Wei Liao
Tai-Bor Wu
Ming-Jui Yang
Yi-Hsien Lue
Jung-Yu Hsieh
Szu-Yu Wang
Guang-Li Luo
Chao-Hsin Chien
Kuang Yeu Hsieh
Rich Liu
Chih-Yuan Lu
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