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Ishita Jain

Indian Institute of Technology Delhi

5

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34

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An investigation of reliability and variability issues in nanoscale SOI and multi-gate MOSFETs: modelling, simulation and characterization

2019 CSI Transactions on ICT
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Modeling of Effective Thermal Resistance in Sub-14-nm Stacked Nanowire and FinFETs

2018 IEEE Transactions on Electron Devices
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Comparison of heat outflow in dense sub-14nm contemporary NFETs: Bulk/SOI, inserted-oxide FinFET and nanowire FET

2016
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Series Resistance Reduction in Stacked Nanowire FETs for 7-nm CMOS Technology

2016 IEEE Journal of the Electron Devices Society
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Nanowire FET design for 7-nm SOI-CMOS technology

2015 S3S | IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference
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