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Woo-Tag Kang
Woo-Tag Kang
Electronic engineering
Gate oxide
Electrical engineering
Engineering
Transistor
5
Papers
6
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A method of manufacturing a transistor having a shallow implantation by using a two-stage Epitaxialschichtprozesses
2003
Woo-Tag Kang
K. Y. Lee
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Forming a gate electrode having dual workfunction
2002
Woo-Tag Kang
K. Y. Lee
Rajesh Rengarajan
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Forming gate electrodes dual workfunction
2002
Woo-Tag Kang
K. Y. Lee
Rajesh Rengarajan
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Shallow n/sup +//p/sup +/ junction formation using plasma immersion ion implantation for CMOS technology
2001
VLSIT | Symposium on VLSI Technology
K. Y. Lee
Jai-Hoon Sim
Yujun Li
Woo-Tag Kang
Rajeev Malik
Rajesh Rengarajan
Susan Chaloux
James David Bernstein
Peter L. Kellerman
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W/WN/poly gate implementation for sub-130 nm vertical cell DRAM
2001
VLSIT | Symposium on VLSI Technology
Rajeev Malik
Lawrence A Clevenger
Irene McStay
Oleg Gluschenkov
Werner Robl
Padraic Shafer
G. Stojakovic
W. Yan
Munir D. Naeem
Ravikumar Ramachandran
K. Wong
J. Prakash
Woo-Tag Kang
Ying Li
R. Vollertsen
Alvin W. Strong
W.Bergner
Ramachandra Divakaruni
Gary B. Bronner
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Citations (2)
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