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Naoya Watanabe
Naoya Watanabe
Renesas Electronics
Engineering
Voltage
Electronic engineering
System on a chip
Chip
2
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Silicon measurements of characteristics for passgate/pull-down/pull-up MOSs and search MOS in a 28 nm HKMG TCAM bitcell
2015
ICMTS | International Conference on Microelectronic Test Structures
Koji Nii
Kenji Yamaguchi
Makoto Yabuuchi
Naoya Watanabe
Takumi Hasegawa
Shoji Yoshida
Takeshi Okagaki
Miho Yokota
Kazunori Onozawa
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A Study of Sense-Voltage Margins in Low-Voltage-Operating Embedded DRAM Macros
2005
IEICE Transactions on Electronics
Akira Yamazaki
Fukashi Morishita
Naoya Watanabe
Teruhiko Amano
Masaru Haraguchi
Hideyuki Noda
Atsushi Hachisuka
Katsumi Dosaka
Kazutami Arimoto
Setsuos Wake
Hideyuki Ozaki
Tsutomu Yoshihara
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