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Hsien-Yuan Liao
Hsien-Yuan Liao
TSMC
Capacitor
CMOS
Electronic engineering
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19
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A Compact Transformer-Based Fractional-N ADPLL in 10-nm FinFET CMOS
2021
IEEE Transactions on Circuits and Systems I-regular Papers
Chao-Chieh Li
Min-Shueh Yuan
Chia-Chun Liao
Chih-Hsien Chang
Yu-Tso Lin
Tsung-Hsien Tsai
Tien-Chien Huang
Hsien-Yuan Liao
Chung-Ting Lu
Hung-Yi Kuo
Augusto Ronchini Ximenes
Robert Bogdan Staszewski
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A 0.011-mm 2 27.5-GHz VCO with Transformer-Coupled Bandpass Filter Achieving -191 dBc/Hz FoM in 16-nm FinFET CMOS
2020
IMS | International Microwave Symposium
Chi-Hsien Lin
Ying-Ta Lu
Hsien-Yuan Liao
Sean Chen
Alvin Leng Sun Loke
Tzu Jin Yeh
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0.034mm 2,725fs RMSジッタ,1.8%/V周波数プッシング,10.8‐10nm FinFETCMOSにおける19.3GHz変圧器ベース分数N全ディジタルPLL【Powered by NICT】
2016
Chao-Chieh Li
Tsai Tsung-Hsien
Min-Shueh Yuan
Chia-Chun Liao
Chih-Hsien Chang
Tien-Chien Huang
Hsien-Yuan Liao
Chung-Ting Lu
Hung-Yi Kuo
Hsieh Kenny
Chen Mark
Ximenes Augusto
Staszewski Robert Bogdan
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A 0.034mm 2 , 725fs RMS jitter, 1.8%/V frequency-pushing, 10.8–19.3GHz transformer-based fractional-N all-digital PLL in 10nm FinFET CMOS
2016
VLSIC | Symposium on VLSI Circuits
Chao-Chieh Li
Tsung-Hsien Tsai
Min-Shueh Yuan
Chia-Chun Liao
Chih-Hsien Chang
Tien-Chien Huang
Hsien-Yuan Liao
Chung-Ting Lu
Hung-Yi Kuo
Kenny Hsieh
Mark Chen
Augusto Ronchini Ximenes
Robert Bogdan Staszewski
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A 12mW all-digital PLL based on class-F DCO for 4G phones in 28nm CMOS
2014
VLSIC | Symposium on VLSI Circuits
Feng-Wei Kuo
Ron Chen
Kyle Yen
Hsien-Yuan Liao
Chewn-Pu Jou
Fu-Lung Hsueh
Masoud Babaie
Robert Bogdan Staszewski
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Citations (16)
1