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Geraldine Jamieson

Katholieke Universiteit Leuven

16

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142

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Sub-100 nm 2 Cobalt Interconnects

2018 IEEE Electron Device Letters
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Key challenges and opportunities for 3D sequential integration

2018 S3S | IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference
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Sequential 3D: Key integration challenges and opportunities for advanced semiconductor scaling

2018 ICICDT | International Conference on IC Design and Technology
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Sub-100 nm2 Cobalt Interconnects

2018 IEEE Electron Device Letters
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3D sequential stacked planar devices on 300 mm wafers featuring replacement metal gate junction-less top devices processed at 525°C with improved reliability

2018 VLSIT | Symposium on VLSI Technology
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Alternative Metals: From AB Initio Screening to Calibrated Narrow Line Models

2018 IITC | International Interconnect Technology Conference
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A Highly Reliable 1×5μm Via-last TSV Module

2018 IITC | International Interconnect Technology Conference
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First Demonstration of 3D stacked Finfets at a 45nm fin pitch and 110nm gate pitch technology on 300mm wafers

2018 IEDM | International Electron Devices Meeting
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3-D Sequential Stacked Planar Devices Featuring Low-Temperature Replacement Metal Gate Junctionless Top Devices With Improved Reliability

2018 IEEE Transactions on Electron Devices
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Ruthenium interconnects with 58 nm 2 cross-section area using a metal-spacer process

2017 IITC | International Interconnect Technology Conference
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