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Stan Filipiak

Freescale Semiconductor

3

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Metrology Of Silicide Contacts For Future CMOS

2007
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Optimization of Dual-ESL Stressor Geometry Effects for High Performance 65nm SOI Transistors

2006 SOI | International SOI Conference
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Reduction of line edge roughness and post resist trim pattern collapse for sub 60 nm gate patterns using gas-phase resist fluorination

2005
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